Substrates and electronic parts formed of ceramics or the like cannot be soldered directly. Therefore, the surface of a substrate or an electronic part is provided with pads formed of a plated film, and solder bumps (lumps) are formed on the pads. Thereafter, soldering is performed through the bumps.
Many conventional solder bump forming methods use solder paste. A plated film on an electronic part is coated with solder paste by a printer or a dispenser, and thereafter, the solder paste is melted by reflow heating to form bumps. Similarly, bumps can also be formed on a substrate. This method is low in cost, but cannot form bumps suitable for fine circuit patterns.
There is also a bump forming method utilizing solder balls. Micro-solder balls are mounted on pads of an electronic part or a substrate and then subjected to reflow heating to form bumps. This method can form bumps suitable for fine circuit patterns. However, solder balls themselves are costly; therefore, the overall cost becomes high.
Attention has been paid to the use of the IMS (Injection Molded Solder) method as a method of forming bumps suitable for fine circuit patterns at reduced cost. With the IMS method, a necessary amount of molten solder is dropped onto a device in a non-oxidizing atmosphere from a nozzle opening of a container holding molten solder therein (Japanese Patent Laid-Open Publication No. Sho 54-82341).
There has also been known a solder application apparatus allowing molten solder to be efficiently supplied to a plurality of points by scanning over a substrate in a horizontal direction (Japanese Patent Application No. Hei 2-015698).
There has also been known an apparatus in which a nozzle head formed of a pliable material is provided with a slit to be used as a nozzle, and molten solder in the nozzle head is discharged from the nozzle by applying a controlled pressure of an inert gas to the molten solder in the nozzle head, thereby supplying a necessary amount of molten solder through openings of a mask having an opening pattern corresponding to a conductor pattern (Japanese Patent Laid-Open Publication No. Hei 11-040937).